Sr. Product Engineer - MOSFET Foundry Transfer & Yield Sustaining 正職
公司名稱：台灣通用器材股份有限公司
工作地點：新北市 新店區
薪資待遇：月薪 40000 ～ 以上
人數：1
工作內容
日班: 08:30-17:30 或09:00-18:00
1.Coordinate with respective backend NPI engineering teams the processing of technology-transfer lots from wafer fabrication out through wafer sort, characterization, qualification, and safe launch
2. Work with Fab Process Engineering and Process Integration to review process transfer status, risks, and action items.
3. Drive lot track schedules, milestones, and issues; communicate risks to the Technology Transfer Project Lead and Product Engineering Director.
-Wafer Yield & Data Analysis
1.Review wafer sort data, wafer maps, WAT/PCM data, electrical yield, and parametric distributions.
2. Identify process-related yield loss, electrical anomalies, and parametric shifts.
3. Work with Fab Yield and Process Engineering teams on root-cause analysis, corrective actions, and yield improvement during safe launch through to product maturity.
-Product Release Coordination - Probe, Characterization, Reliability Testing
1. Project coordinates the following key activities in the product transfer cycle
2. Wafer probe and engineering characterization activities before package assembly.
3. DC and AC characterization within the characterization team and support correlation between wafer probe, final test, and reliability data.
4. Assembly, Final Test, Reliability, Failure Analysis, Quality, Operations, and Supply Chain to support product release.
5. Interface with reliability teams for AEC-Q101 reliability tests such as HTRB, HTGB, Temperature Cycling, Power Cycling, HAST, THB, HTSL, Autoclave, and package qualification testing.
6. Support failure analysis reviews when yield, qualification, or test issues occur.
7.Prepare engineering build reports, yield summaries, qualification updates, and manufacturing readiness materials.
1.Coordinate with respective backend NPI engineering teams the processing of technology-transfer lots from wafer fabrication out through wafer sort, characterization, qualification, and safe launch
2. Work with Fab Process Engineering and Process Integration to review process transfer status, risks, and action items.
3. Drive lot track schedules, milestones, and issues; communicate risks to the Technology Transfer Project Lead and Product Engineering Director.
-Wafer Yield & Data Analysis
1.Review wafer sort data, wafer maps, WAT/PCM data, electrical yield, and parametric distributions.
2. Identify process-related yield loss, electrical anomalies, and parametric shifts.
3. Work with Fab Yield and Process Engineering teams on root-cause analysis, corrective actions, and yield improvement during safe launch through to product maturity.
-Product Release Coordination - Probe, Characterization, Reliability Testing
1. Project coordinates the following key activities in the product transfer cycle
2. Wafer probe and engineering characterization activities before package assembly.
3. DC and AC characterization within the characterization team and support correlation between wafer probe, final test, and reliability data.
4. Assembly, Final Test, Reliability, Failure Analysis, Quality, Operations, and Supply Chain to support product release.
5. Interface with reliability teams for AEC-Q101 reliability tests such as HTRB, HTGB, Temperature Cycling, Power Cycling, HAST, THB, HTSL, Autoclave, and package qualification testing.
6. Support failure analysis reviews when yield, qualification, or test issues occur.
7.Prepare engineering build reports, yield summaries, qualification updates, and manufacturing readiness materials.
具備條件
•BS or MS in Electrical Engineering, Materials Science, Physics, or related discipline.
5–10+ years of semiconductor Product Engineering front end experience.
Experience with Power MOSFET technologies
Knowledge of wafer fabrication and wafer sort.
Project coordination of package assembly and test would be advantageous.
Experience coordinating engineering lots through NPI and technology transfer.
Understanding of electrical characterization, reliability qualification, and failure analysis.
Experience supporting wafer foundries and OSAT partners.
Extensive use of yield management software
Knowledge of SPC, Cp/Cpk, DOE, yield analysis, and statistical methods.
Strong project coordination and cross-functional communication skills.
Automotive semiconductor experience preferred
5–10+ years of semiconductor Product Engineering front end experience.
Experience with Power MOSFET technologies
Knowledge of wafer fabrication and wafer sort.
Project coordination of package assembly and test would be advantageous.
Experience coordinating engineering lots through NPI and technology transfer.
Understanding of electrical characterization, reliability qualification, and failure analysis.
Experience supporting wafer foundries and OSAT partners.
Extensive use of yield management software
Knowledge of SPC, Cp/Cpk, DOE, yield analysis, and statistical methods.
Strong project coordination and cross-functional communication skills.
Automotive semiconductor experience preferred
學歷要求
大學
工作時間
日班 : 08:30 ～ 17:30